MICRO-POWER ANALOG IC DESIGN |
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MOS Transistor Modeling for Low-Voltage and Low-Power Circuit Design Evolution of CMOS technologies: process scaling, low-voltage constraint. Basic long-channel static theory. Short- and narrow-channel effects. Quasi-static dynamic model. Thermal and flicker noise model.Parameter extraction. The EKV model and its use for LV and LP analog circuit design. |
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Basic Low-Power, Low-Voltage Circuit Techniques Weak inversion and bipolar operation of MOS transistors. BiCMOS versus CMOS. Passive components and pseudo-resistive networks. Elementary building blocks operated at low supply voltage and/or low current: current mirrors, standard and special structures; differential pairs and linearization techniques; elementary voltage-gain cells, MOS- inverter amplifier. Low-voltage cascode and pseudo-cascode configurations. LP/LV current and voltage references. Translinear circuits and principle of log-domain filters. |
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Stability of Operational Amplifiers Multistage operational amplifiers require compensation capacitances for stability. The conditions for stability are discussed for both two-stage and three-stage operational amplifiers. Techniques are given to avoid the positive zero and to realize minimum power consumption at the same time. Several design examples are worked out. |
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Systematic Design of Low-Power Operational Amplifiers For low-power optimization, an operational amplifier can be designed for high speed and stability according to three different design procedures, all leading to the same final result. They will be discussed for a two- and three stage amplifier. The compromises with other specifications such as noise, input and output range will be discussed as well and illustrated for a number of often used configurations. |
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Important Opamp Configurations Long list of opamp configurations is discussed to show which alternative circuit tricks have been used to comply with certain specifications. Considerable design detail is presented on the symmetrical opamp and on the folded cascode. This lecture includes mainly circuit realizations in CMOS but also some in BICMOS technology. |
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Noise Performance of Elementary Transistor Stages Long list of opamp configurations is discussed to show which alternative circuit tricks have been used to comply with certain specifications. Considerable design detail is presented on the symmetrical opamp and on the folded cascode. This lecture includes mainly circuit realizations in CMOS but also some in BICMOS technology. |
Fully-Differential Operational Amplifiers Together with distortion, noise is the main limitation of the performance of analog circuits. It is introduced with simplified expressions for both the MOST and bipolar transistor and applied to the elementary stages with one and two transistors. Also the noise due to parasitic resistances is identified and described. Considerable attention goes to resistive and capacitive noise matching in ultra-low-noise amplifiers. |
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Bandgap and Current Reference Circuits Voltage references are required in all ADC's. Current references are required for all biasing. Bandgap references in CMOS technologies are discussed. The compromises at low power consumption are highlighted. Realizations are presented of bandgap references down to 0.8 V supply voltage. |
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Distortion in Elementary Transistor Circuits For low supply voltage, a larger fraction of the total supply voltage has to be used, leading to more distortion. The several sources of nonlinear distortion are discussed for MOSTs and bipolar transistor, single-ended and differential. Also the role of feedback is examined in detail. All distortion mechanisms are analyzed in full operational amplifier configurations. |
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Low-Power Continuous-Time Filters High-frequency filters are usually continuous-time type filters. They are simple in schematic and are able to handle large signals with low distortion. Moreover they need tuning circuits to be able to set the frequency and the quality factor. Most important filter schematics are reviewed and compared for high-frequency capability and power consumption. |
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Matching of MOS Transistors in Deep-Submicron Orders of magnitude. Offset: electrical, technological and timing aspects. Random matching: general description, application to MOS. Deep submicron CMOS matching considerations. Modeling and simulation of MOS transistor mismatch. Design examples. Packaging effects. |
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Layout Considerations in Mixed-Signal Circuit Design After an introduction on elementary IC device characteristics and circuit analysis aspects (statistics, spread, fluctuations, parametric gradients), this lecture focusses on the two main attention areas of mixed-signal circuit layout, namely floorplan (design) related issues and technology related hazards. The floorplan design part discusses topics like cross-talk, clocks, power supply loops, guard rings, temperature gradients and design discipline. The technology part focuses on proximity and reticle effects, layout induced mechanical stress asymmetries, and common centroid layout solutions. The lecture finishes with a summary and a comprehensive set of “what if” guidelines. |
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Ultra-Low Voltage Analog Circuit Design Abstract Missing |
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Ultra-Low Power Opampless ADCs This talk focuses on the design of ultra low power high performance discrete time analog to digital converters using precision switched capacitor circuits without Operational Amplifiers. These OpAmpless switched capacitor circuits are able to achieve high levels of precision through the use of zero-crossing detectors that detect virtual ground conditions instead of forcing that conditions as in OpAmp based circuits. This talk will describe the zero-crossing based switched capacitor technology, its implementation, and its role in data conversion, filters and other analog circuits, and its wider applicability in low power electronics. |
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