|
PRACTICAL ASPECTS IN MIXED-SIGNAL ICs
|
||
|
Trade-off between Analog and Digital - The Impact of Technology Scaling
Abstract Missing. |
||
|
Ultra Low-Power Mixed Signal Interfaces
Abstract Missing. |
||
|
Noise Coupling in Mixed-Mode ICs: Mechanisms
Survey of practical aspects of key analog and analog/digital interaction problems: Sources of noise. Methods of coupling. Effects of substrate referencing, power distribution, chip signal isolation/shielding techniques, packaging, card layout and circuit topology on noise. |
||
|
Noise Coupling in Mixed-Mode ICs: Simulation/Measurement
Analysis and modeling of particular analog and mixed signal noise problems along with experimental data results: Modeling and predicting chip/package noise prior to semi-conductor processing; Chip substrate modeling. |
||
|
Noise Coupling in Mixed-Mode ICs: Design Strategy/Hardware Example
Design strategies for reducing noise with emphasis on a product hardware example. Noise prevention techniques, noise reduction techniques, and noise rejection techniques. Actual hardware experiences along with techniques, methodologies, and strategies for analog mixed-signal noise reduction. |
||
|
Matching Impairments in Mixed-Mode ICs
Random matching is a well known limitation for mixed-signal circuit design but this lower limit is often degraded or even dominated by systematic errors induced by processing imperfections, violation of physical device limits and environmentally induced gradients at chip level. Most of these effects are not or are difficult to include in the design flow. Several effects, such as mechanical stress, dielectric relaxation, degradation and thermal gradients are discussed in detail. |
||
|
Opamp Design Towards Max. GBW
An overview of design techniques to achieve the maximum GBW in a CMOS technology is presented. An analysis of different feedforward techniques and their effect on the settling time are studied. |
||
|
Interference Effects: CMRR/PSRR
Some EMC interference effects in integrating RF circuits are addressed and discussed. The coupling mechanism of different building blocks to the sensitive RF circuits are addressed. Design techniques for high power supply rejection ratio in basic analog building blocks are studied. |
||
|
Design for EMC
Introduction to EMC problems: EMI, EME, EMS, charge pumping. EMS design techniques on basic building blocks: principles, current mirror, input and output structures. |
||
|
Ultra-Low Voltage Analog Circuits
Fundamental and technology limitations limits for ultralow-voltage (ULV) analog circuit design. MOS transistor operation in weak inversion, Gm/ID characteristic, inversion coefficient design approach. Basic building blocks for ULV analog and RF circuits. Design examples. |
||
|
Sampled Noise in SC Circuits
Classification and characterization of continuous-time and sampled noise in analog ICs. Thermal noise in switches and opamps. Noise in an SC branch. Estimation of thermal noise in SC integrators, filters and delta-sigma ADC loops. |
||
|
Offset and CMRR: Random and Systematic
Random mismatch between the equally-designed transistors in a differential pair causes offset and reduction of both the CMRR and the PSRR. This phenomenon of random mismatch is discussed in detail. Its relevance is analyzed for differential pairs, current mirrors, etc. It is followed by a number of design guidelines for better matching. |
||
|
Fully Differential Amplifiers
In mixed-mode design all circuits have to be fully differential. Therefore common-mode feedback amplifiers have to be included to ensure proper biasing and common-mode rejection. They are subject to specifications such as high frequency performance and low power consumption. All possible schematics are reviewed and compared. |
||
|
Design for Manufacturing Robustness
Monolithic design has, from the earliest days, placed dependence on the high probability of like devices (transistors, resistors, capacitors, etc.) matching very closely to ensure accurate operation of the overall circuit. While this is well-known, there are many other issues that need attention if an IC product is to be manufacturable in high volumes. This module discusses these issues at some length, beginning with the concept of "Foundation Design", which is step-by-step procedure for exploring individual device sensitivities. |
||
|
High-Voltage / High-Field Problems
Abstract Missing. |