TRANSISTOR-LEVEL ANALOG IC DESIGN |
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Introduction & MOS Transistors What is this course about? What are p-amps? The ideal Op-amp; common- and differential mode; feedback; op-amp applications. Op-amp non-idealities: frequency behavior; time domain behavior & stability; polar diagram & bode-plots; gain- and phase margin; signal integrity; noise; distortion; dynamic range; other non-idealities: offset; power supply rejection ratio. Effects of feedback: feedback and gain; feedback and bandwidth; a slightly different schematic; feedback and impedances. Simulations: SPICE options and models; loop-gain in feedback situations; DC, AC and transient analysis; SPICE DC analysis; SPICE AC analysis; SPICE transient analysis.The MOS Transistor: regions of operation: MOST CV-curve. Calculation of the MOS current. Graphical MOST-model. A simplified model for hand-calculations. A more accurate approach: drift and diffusion; weak- and strong inversion. Improved model for hand-calculations: body-effect; current triangle-model. How to use the graphical MOST-models? Second order effects: body-effect; channel-length shortening; mobility reduction; velocity saturation; weak inversion; drain induced barrier lowering and static feedback; weak-avalanche. Example: the current-division technique; the basic principle; proof of the principle. |
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Single-Stage Amplifiers, part I DC-behavior of single transistor amplifier. AC-behavior of single transistor amplifier: bode-plot; small-signal parameter overview. Transient behavior of single transistor amplifier: single-stage and feedback; settling behavior. Fundamental limitations of the basic gain-stage: the process-line. Cascoding: effect of cascoding on DC-gain; cascoding and AC-behavior; the process-line. MOST Ft. The gain-boosting technique: DC-behavior; cascoding once again; adding an additional stage; repetitive gain-boosting; high frequency behavior; gain as normalized impedance. |
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Single-Stage Amplifiers, part II Simplest Structure. Simplest structure with large output swing. folded cascode structure. Fully differential structures: the common-mode problem; output common-mode control; input common-mode control; common-mode rejection ratio. Other differential op-amps: gain-boosting technique; telescopic op-amp. How to design single-stage op-amps? Noise and Vgt's; distortion? Slew-rate: limited input voltage swing; limited available output current cascode biasing; how does slewing look? How to improve the slew-rate. Cascode biasing. |
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gm/ld Methodology for MOS Device Sizing An Introduction of the gm/Id analog circuit design methodology will be presented and applied to the MOS transistor sizing. |
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Noise in MOS Transistors Part 1: Origins and Basic Properties: thermal noise; spectrum; standard deviation; noise properties; kT/C noise; 1/f noise; how to calculate noise of a circuit? Input and output referred noise; signal-to-noise ratio; noise integration in a certain bandwidth. Part 2: Noise in Circuit Design: noise in basic gain stage; noise of basic gain stage with PMOST current source; noise of a cascode transistor; design of a cascode stage. |
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Distortion Harmonic performance of a slightly non-linear circuit. How to calculate THD? Example: single transistor gain-stage with resistor load. Symmetrical systems. Distortion and feedback: distortion of the reciprocal relation; back to distortion and feedback; example; modulation depth; calculating HD2 at the gate; calculating HD2 at the output; distortion in multi-stage design. Distortion resume: how to calculate THD? Example without feedback (with some numbers); Example with feedback (with some numbers). |
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Basic Sub-Circuits Basic configurations: c.s., c.g. and c.d. The differential pair: common and differential signals; large signal behavior: Iout as a function of Vin; mathematical; graphical; offset. Current sources. Biasing: voltage biasing; current biasing; replica biasing; Gm-biasing |
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Basic Analog Structures Design Basic analog topologies such as current mirror, cascode current mirrors, differential Pair, etc. will be presented as well as their design methodology using gm/Id. |
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Gain-Boosting and Settling Behavior High-Frequency Behavior: gain as normalized impedance. Settling behavior: a closer look; doublets; how to judge op-amp settling? The problem; virtual ground signal; settling accuracy as a function of time; optimizing settling behavior in gain-boosting; what about the 2nd loop? Stability conditions. Application Example: switched-capacitor circuits: what is a switched capacitor circuit? SC-resistor; stray capacitances; SC-integrator. Process Technology: introduction. photolithography: masks; implantation and diffusion. CMOS processes: poly-gate: self-aligned structure; LOCOS; epitaxy. Matching: intrinsic transistor with small parallel transistor; dimensions; orientation; size (Pelgrom's Paper); common centroid structures. Bipolar processes: Epi and buried layer; cross-sections and top-views. |
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Two-Stage Amplifiers Two-Stage Design: need for compensation. Miller compensation: effect on the first pole; pole splitting; the second pole. Analyzing the transfer-function: simplified expression; cload and stability; zero and nulling resistor. When would you use a Miller op-amp? |
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Matching of MOS Transistors in Deep-Submicron Orders of magnitude. Offset: electrical, technological and timing aspects. Random matching: general description, application to MOS. Deep submicron CMOS matching considerations. Modeling and simulation of MOS transistor mismatch. Design examples. Packaging effects. |