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August 23-27, 2010 EPFL Premises, Lausanne, Switzerland |
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| MONDAY, August 23 | ||
| 8:30-12:00 am | MOS and Bipolar: Modes of Operation and Models | Eric Vittoz |
| 1:30-5:00 pm | Passive Components and Parasitic Effects | Eric Vittoz |
| TUESDAY, August 24 | ||
| 8:30-12:00 am | Elementary Building Blocks | Eric Vittoz |
| 1:30-5:00 pm | CMOS Off-Chip Drivers | Rinaldo Castello |
| WEDNESDAY, August 25 | ||
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8:30-12:00 am
& 1:30-5:00 pm |
Analog Functional Blocks | Willy Sansen |
| THURSDAY, August 26 | ||
| 8:30-10:00 am | Layout Techniques for Analog Circuits | Eric Vittoz |
| 10:30-12:00 am | Voltage References | Eric Vittoz |
| 1:30-5:00 pm | Technology and other Limitations for Analog Design | Herman Casier |
| FRIDAY, August 27 | ||
| 8:30-10:00 am | Technology and other Limitations for Analog Design (continued) | Herman Casier |
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10:30-12:00 am
& 1:30-5:00 pm |
Switched-Capacitor Circuit Design | Gabor Temes |