HIGH-PERFORMANCE DATA CONVERTERS
June 25-29, 2012
EPFL Premises, Lausanne, Switzerland
MONDAY, June 25
8:30-10:00 am Overview of High-Performance Data Converters Marcel Pelgrom
10:30-12:00 am Fundamental Limitations Marcel Pelgrom
1:30-5:00 pm Flash ADCs Marcel Pelgrom
TUESDAY, June 26
8:30-12:00 am Mismatch-Shaping Multi-bit DACs for Delta-Sigma Data Converters Ian Galton
1:30-3:00 pm High-Speed DACs in CMOS Michiel Steyaert
3:30-5:00 pm Nyquist-Rate Current-Steering DACs Ian Galton
WEDNESDAY, June 27
8:30-12:00 am Pipeline ADCs Ian Galton
1:30-5:00 pm Recent Developments in SAR ADCs Behzad Razavi
THURSDAY, June 28
8:30-10:00 am Ultra Low-Voltage Delta-Sigma Data Converters Willy Sansen
10:30-12:00 am Continuous-Time Delta-Sigma Design Willy Sansen
1:30-3:00 pm Sample-and-Hold and Comparator Design for ADCs Behzad Razavi
3:30-5:00 pm Ultra-Low Power Opampless ADCs Kush Gulati
FRIDAY, June 29
8:30-12:00 am Embedded Analog-to-Digital Converters Klaas Bult
1:30-3:00 pm A 12b 2.9GS/s Current Steering DAC with IM3 < -60dBc beyond 1GHz in 65nm CMOS Klaas Bult