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June 21-23, 2010 EPFL Premises, Lausanne, Switzerland |
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| MONDAY, June 21 | ||
| 8:30-10:00 am | Introduction & MOS Transistors | Klaas Bult |
| 10:30-12:00 am | Single-Stage Amplifiers, part I | Klaas Bult |
| 1:30-3:00 pm | Single-Stage Amplifiers, part II | Klaas Bult |
| 3:30-5:00 pm | gm/Id Methodology for MOS Device Sizing | Marc Pastre |
| TUESDAY, June 22 | ||
| 8:30-10:00 am | Noise in MOS Transistors | Klaas Bult |
| 10:30-12:00 am | Distortion | Klaas Bult |
| 1:30-3:00 pm | Basic Sub-Circuits | Klaas Bult |
| 3:30-5:00 pm | Basic Analog Structures Design | Marc Pastre |
| WEDNESDAY, June 23 | ||
| 8:30-10:00 am | Gain-Boosting and Settling Behavior | Klaas Bult |
| 10:30-12:00 am | Two-Stage Amplifiers | Klaas Bult |
| 1:30-5:00 pm | Matching of MOS Transistors in Deep-Submicron | Marcel Pelgrom |