MICRO-POWER ANALOG IC DESIGN |
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MOS Transistor Modeling for Low-Voltage and Low-Current Circuit Design A symmetrical analytical model will be introduced, that encapsulates the essential behavior of MOS transistors down to low saturation voltage and very small drain current. The core of this model, which is applicable to the synthesis and the understanding of low-voltage low-current analog circuits, requires only 3 parameters. A few more parameters will be added to include effects such as channel shortening and 1/f noise. Related small signal DC and quasi-static AC model. Noise, temperature behavior and matching. |
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Limits to Low-Voltage, Low-Power Analog Design Fundamental limit of the trade-off speed/power/signal-to-noise and comparison with digital; increased power needed for amplification and high-Q circuits; further obstacle to low-power. Fundamental limits to low-voltage operation. Absolute minimum of supply voltage. Consequences of reducing the MOS saturation voltage and the signal swing. |
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Basic Low-Voltage, Low-Power Circuit Techniques Weak inversion and bipolar operation of MOS transistors. BiCMOS versus CMOS. Passive components and pseudo-resistive networks. Elementary building blocks operated at low supply voltage and/or low current: current mirrors, standard and special structures; differential pairs and linearization techniques; elementary voltage-gain cells, MOS- inverter amplifier. Low-voltage cascode and pseudo-cascode configurations. LP/LV current and voltage references. Translinear circuits and principle of log-domain filters. |
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Stability of Operational Amplifiers Multistage operational amplifiers require compensation capacitances for stability. The conditions for stability are discussed for both two-stage and three-stage operational amplifiers. Techniques are given to avoid the positive zero and to realize minimum power consumption at the same time. Several design examples are worked out. |
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Systematic Design of Low-Power Operational Amplifiers For low-power optimization, an operational amplifier can be designed for high speed and stability according to three different design procedures, all leading to the same final result. They will be discussed for a two- and three stage amplifier. The compromises with other specifications such as noise, input and output range will be discussed as well and illustrated for a number of often used configurations. |
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Important Opamp Configurations Long list of opamp configurations is discussed to show which alternative circuit tricks have been used to comply with certain specifications. Considerable design detail is presented on the symmetrical opamp and on the folded cascode. This lecture includes mainly circuit realizations in CMOS but also some in BICMOS technology. |
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Noise Performance of Elementary Transistor Stages Long list of opamp configurations is discussed to show which alternative circuit tricks have been used to comply with certain specifications. Considerable design detail is presented on the symmetrical opamp and on the folded cascode. This lecture includes mainly circuit realizations in CMOS but also some in BICMOS technology. |
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Fully-Differential Operational Amplifiers Together with distortion, noise is the main limitation of the performance of analog circuits. It is introduced with simplified expressions for both the MOST and bipolar transistor and applied to the elementary stages with one and two transistors. Also the noise due to parasitic resistances is identified and described. Considerable attention goes to resistive and capacitive noise matching in ultra-low-noise amplifiers. |
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Bandgap and Current Reference Circuits Voltage references are required in all ADC's. Current references are required for all biasing. Bandgap references in CMOS technologies are discussed. The compromises at low power consumption are highlighted. Realizations are presented of bandgap references down to 0.8 V supply voltage. |
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Micro-Power Data Converters In medical devices, sensor networks and other applications, power is supplied by batteries or obtained by scavenging. For such applications, the electronic interfaces are only allotted very little power, typically a few microwatts. This lecture provides an overview of micro-power D/A and A/D converter circuits and their design. |
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Distortion in Elementary Transistor Circuits For low supply voltage, a larger fraction of the total supply voltage has to be used, leading to more distortion. The several sources of nonlinear distortion are discussed for MOSTs and bipolar transistor, single-ended and differential. Also the role of feedback is examined in detail. All distortion mechanisms are analyzed in full operational amplifier configurations. |
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Low-Power Continuous-Time Filters High-frequency filters are usually continuous-time type filters. They are simple in schematic and are able to handle large signals with low distortion. Moreover they need tuning circuits to be able to set the frequency and the quality factor. Most important filter schematics are reviewed and compared for high-frequency capability and power consumption. |
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Matching of MOS Transistors in Deep Submicron Technology After introducing the relevance of parametric mismatch fluctuations for some typical circuits, a number of relevant concepts for understanding statistics and parametric fluctuation phenomena are discussed in general. Subsequently, these concepts are developed towards parametric fluctuation observations and models for MOSFETs. Yield issues and circuit simulation techniques are treated through practical examples. Implications of CMOS technology scaling are discussed both in terms of physical as well as circuit performance. Finally, advantages and limitations of new device architectures are briefly touched upon, and the lecture is rounded off with some guidelines and rules of thumb. |
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Layout of Analog Circuits After an introduction on elementary IC device characteristics and circuit analysis aspects (statistics, spread, fluctuations, parametric gradients), we focus on the two main attention areas of mixed-signal circuit layout, namely floor plan related issues and technology related hazards. The floor plan section discusses topics like cross-talk, clocks, power supply loops, guard rings, temperature gradients and design discipline. The technology part focuses on layout induced mechanical stress asymmetries, and common centroid layout solutions. The lecture is summarized and rounded off with a comprehensive set of "what if" guidelines. |
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Low-Power Oscillator Design This section will introduce the fundamental concepts and main oscillator circuits used in monolithic MOS design. Properties of these circuits will be compared and the origin of phase noise described. Design approaches and concerns will be presented for both fixed frequency and tunable VCOs. Finally a figure of merit for oscillators will be developed and then used to compare a number of innovative designs. |
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