DESIGN FOR HOSTILE ENVIRONMENT
AUTOMOTIVE AND INDUSTRIAL
September 8-12, 2008
EPFL, Lausanne, Switzerland
MONDAY, September 8
8:30-12:00 am Design for Hostile Environment: the Differences and Challenges Herman Casier,
Consultant
1:30-5:00 pm Design for High Temperature Aarnout Wieers,
AMI Semiconductor
TUESDAY, September 9
8:30-12:00 am High-Voltage IC Design Hussein Ballan,
Advanced Silicon
1:30-5:00 pm Interferences Between the Environment and the Chip Herman Casier,
Consultant
WEDNESDAY, September 10
8:30-10:00 am Interference Sources and coupling

Michiel Steyaert,
KU Leuven
10:30-12:00 am Mismatch and Lay-out strategies Michiel Steyaert,
KU Leuven
1:30-3:00 pm CMRR and PSRR Michiel Steyaert,
KU Leuven
1:30-5:00 pm Design for EMC Michiel Steyaert,
KU Leuven
THURSDAY, September 11
8:30-12:00 am
& 1:30-5:00 pm
Smart Power Circuit Design Heinz Zitta, Infineon
FRIDAY, September 12
8:30-12:00 am ESD Protection and Reliability Yusuf Leblebici, EPFL
1:30-3:00 pm Design for Low EME Wim Dehaene,
KU Leuven